AMD unleashes intriguing new EPYC server CPUs — and its main feature could be key for Ryzen’s future

3 days ago

AMD has yet launched its EPYC 8004-series processors, pinch a caller SP6 socket and up to 64 Zen-4c cores (128 threads). The Siena CPU scope completes nan family whose different members see Genoa (high performance), Genoa-X (big cache) and Bergamo (cloud native). In AMD’s ain words, Siena is simply a caller aquatics lane successful its halfway roadmap.

Among nan twelve caller releases is simply a apical of nan scope model, nan single-socket 8534P, which has a guidelines wave of 2.3GHz pinch 128MB L3 cache and a 200W TDP; a network-specialized type (PN) focusing connected edge-optimized and connection servers is besides disposable pinch a little TDP and little guidelines wave but a wider operating somesthesia range.

Despite being slower, nan PN parts will waste for much (about 10% dearer) but wide AMD is still little costly than nan balanced Intel part. The caller processors will spell heads connected against a plethora of Xeon processors from Intel’s Gold, Silver, Bronze and D-range, operating betwixt 96W and 185W.

None of them though connection nan aforesaid firepower (they apical astatine 32 cores/64 threads) and representation support (4TB vs 6TB for AMD). AMD’s cherry-picked benchmarks pit nan 8534P against a 300W part, nan Xeon 8471N which has less cores, a smaller cache and a little timepiece speed. Even nether these conditions, AMD’s Siena travel connected top.

The caller EPYC 8004 Series processors widen AMD activity successful azygous socket platforms by offering fantabulous CPU power ratio successful a package tuned to meet nan needs of abstraction and power-constrained infrastructure

Dan McNamara, elder vice president, AMD

Zen 4c coming to Ryzen

Intel launched powerfulness and ratio cores successful its user scope earlier adopting them for business products - truthful could AMD do nan aforesaid pinch its Zen 4c CPU microarchitecture but from business to consumer?

Well it is already happening. AMD introduced nan Ryzen Z1 earlier this year, and it could beryllium nan first of galore models to come. Zen 4c - which powers nan Phoenix2 CPU - has nan aforesaid IPC (instruction per clock) arsenic Zen 4 and it’s really erstwhile it comes to nan magnitude of L3 cache that things disagree (actually, there’s a spot much but I’m complete simplifying).

AMD disclosed earlier this twelvemonth that a Zen 4c halfway is little than two-thirds nan size of a full-fledged Zen 3 core. A smaller halfway is not only cheaper to nutrient but it besides dissipate little power particularly arsenic Zen 4c parts thin to person little guidelines timepiece speed. Could it make its measurement successful SMB servers successful nan future? Don’t discount it.